Lead Static Timing Analysis Engineer (STA) Job at SBT, Fremont, CA

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  • SBT
  • Fremont, CA

Job Description

SBT is the exclusive executive recruiting firm for this confidential position.

This confidential company is strategically bringing on a hands-on technical STA lead. In this role, the timing design expert will be collaborating cross-functionally with a talented team of systems HW engineers and SW architects to develop cutting-edge computing systems. This individual will have first-hand involvement in the full lifecycle of complex chip development, solving complex challenges directly affecting tier-one customers.

Technical Responsibilities:

  • Perform static timing analysis (STA) on digital circuits to ensure timing closure and identify timing-related issues
  • Develop and maintain STA scripts and tools to automate timing analysis and reporting
  • Collaborate with design teams to identify and resolve timing-related issues, including clock domain crossing, metastability, and setup/hold violations
  • Develop and maintain timing models and constraints for complex digital circuits
  • Optimize timing performance by analyzing and optimizing clock tree, flip-flop placement, and routing
  • Work closely with physical design engineers to ensure timing constraints are met during the physical design phase

Qualifications

  • 7+ years of industry experience is required
  • Master's degree is preferred
  • Proven experience with STA signoff constraint authoring for full-chip level, tapeout signoff requirements, checklists, and associated automation.
  • Expertise in various static timing tools (e.g., PrimeTime, Tempus).

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